| 摘要 |
PURPOSE: To obtain a semiconductor storage device that can be operated at a low voltage through full swing of bit line potential by comprising one bit by a pair of transistors, first and second conductive transistors. CONSTITUTION: One bit of a memory cell is comprised of a pair of transistors, first and second conductive transistors Q1 and Q2 , and the gate of the first conductive transistor Q1 is connected with a word line WL, while the drain is connected with a bit line BL. In addition, the gate of the other second conductive transistor Q2 is connected with the reciprocal signal line of the word line WL and its drain is connected with the bit line BL. When an H level is to be written, a power supply potential is connected to the source of the transistor Q1 and the source of the transistor Q2 . Further, an L level is to be written, a grounding potential is connected to the source of the transistor Q1 and the source of the transistor Q2 . |
