| 摘要 |
<p>PURPOSE: To facilitate data writing at the time of write access while maintaining the same bit line driving capacity as the one at the time of read access. CONSTITUTION: The memory cell Mij is powered through the power source line side control circuit 12 and the earth wire side control circuit 14. At the time of write access, the retention characteristic of the stored bit data is suppressed to facilitate writing by suppressing the power source fed to the above memory Mij using the power source line side control circuit 12 and the earth wire side control circuit 14 according to write/read control signals W/R. Otherwise, the retention characteristic of bit data cannot be suppressed and the bit line driving capacity at the time of read access is maintained.</p> |
