发明名称 POWER-OUT RESETTING SYSTEM
摘要 PROBLEM TO BE SOLVED: To prevent abnormal operation before reference voltage is stabilized by detecting whether the voltage of a voltage source is within a preset level or not by plural reference voltage generators, a delay/usage prohibiting means and a voltage detecting means and outputing a signal for usage to be prohibited or not, if it is below the minimum level. SOLUTION: A reference voltage generator means is formed with a Vbg bias generator 12, a Vbe bias generator 14, a Vbg generator 16 and a VIbg generator 18. A delay/usage prohibiting means is used with a Vcomp generator. A voltage detecting means is used with an overvoltage detecting path 22 and a short-voltage detector. A terminal 11 is jointed to the first inputs of the generators 12, 14 and the third inputs of the detectors 22, 24 and a terminal 13 is jointed to the second input of the generator 20 and the fourth inputs of the detectors 22, 24 and an output logic circuit 26, respectively. When the terminal 11 shows 1 and the terminal 13 shows 0, the voltage of the voltage source is within a level and, when the terminal 11 shows 0 and the terminal 13 shows 1, a system 10 is prohibited from usage.
申请公布号 JPH0862259(A) 申请公布日期 1996.03.08
申请号 JP19950176473 申请日期 1995.07.12
申请人 GENERAL INSTR CORP 发明人 CHIN ERU HOAN
分类号 G01R19/165;G01R31/30;G01R31/40;G05F1/10;H02J1/00 主分类号 G01R19/165
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