BI-CMOS gate array semiconductor integrated circuits and internal cell structure involved in the same

摘要

The invention provides a Bi-CMOS gate array semiconductor integrated circuit chip including a peripheral region including an input/output circuit region and a bonding pad region and an internal cell structure provided within an internal cell region involved in the semiconductor integrated circuit chip. The internal cell structure comprises MOS transistor cell units including a plurality of MOS transistors and bipolar transistor cell units including a plurality of bipolar transistors wherein a distribution ratio in the number of the MOS transistor cell units to the bipolar transistor cell units has such a variation that the distributed ratio is high in a region that requires driving of almost no or a small load while the distributed ratio is low in a region that requires driving of a large load.