High byte right-shift apparatus with a register alias table

摘要

A high byte right-shift detection mechanism with a register alias table unit (RAT) for selectively causing right-shifting of high byte physical source register data before operations are executed within a microprocessor is described. A high byte right-shift condition occurs when a logical source register that is presented to the RAT for renaming is a high byte register and the corresponding physical source register selected by the RAT is not right-adjusted. A non right-adjusted physical source register is detected when either the physical source register is an architectural state register or the physical source register is a larger width register that includes the renamed high byte register. The high byte right-shift detection mechanism detects a high byte shirt-right condition when a logical source register is renamed and generates shift bits and zero extend bits to control the right-shifting and zero extending of the data in the correspondingly renamed physical source register before execution by an execution unit that assumes right-adjusted input data. Right-adjusted result data from the execution unit is stored in a physical destination register (a speculative state register) in the re-order buffer (ROB) until retirement. If the RAT renames another high byte logical source register to source that physical destination register before the register retires, right-shifting of the physical destination register data is not required because the data is already right-adjusted. At retirement, physical destination register data corresponding to a high byte logical destination register is left-shifted and stored in the high byte register of a non-speculative state register in the retirement register file (RRF).