发明名称
摘要 PURPOSE:To detect surely an input frequency signal with simple constitution by converting a carried input frequency component into a signal immune to noise component. CONSTITUTION:A reception signal RVS is digitized by an analog-digital converting circuit 2 in sampling operation with a sampling time DELTAt, and an output of the circuit 2 and an output of a voltage controlled oscillator 4 are multiplied by the 1st multiplier circuit 3 as complex numbers. Then the real part Re1 is fed to the 2nd multiplier circuit 5 as the real part data I1K of directly ad fed to the 2nd real part data I1(k-1) while being delayed by a delay circuit 6, and the imaginary part Im1 is fed to the 2nd multiplier circuit 5 directly as the 1st imaginary part data Q1k and fed to the circuit 5 as the 2nd imaginary part data Qi(k-1) while being delayed by the delay circuit 7, and they are multiplied. Then the output of the circuit 5 is integrated by integration circuits 8, 9, a mean value is formed by a cpu l10, and its output is inputted to the voltage controlled oscillator 4.
申请公布号 JPH0821963(B2) 申请公布日期 1996.03.04
申请号 JP19840245340 申请日期 1984.11.19
申请人 发明人
分类号 H04L27/22;H04L27/227;(IPC1-7):H04L27/22 主分类号 H04L27/22
代理机构 代理人
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