Verfahren zum automatischen Auswählen eines taktsteuernden Signalpfads in umprogrammierbaren Systemen zur Hardware-Emulation

摘要

Potential clock qualifiers in a netlist description of an integrated circuit, the netlist comprising logic elements, are identified by initializing every net to a speed of zero, identifying all potential clock nets so that all signals with a path to a clock source has a speed of one, computing the maximum speed of each output net of each of the logic elements, and marking as a potential clock qualifier any net that is input to a logic element is slower than the maximum speed of any net input to that logic element (except in the case of multiplexers).