发明名称 ACCURATE DIGITAL FAULT TOLERANT CLOCK
摘要 This invention relates to fault-tolerant real-time clock capable of withstanding n-faults, including Byzantine faults. In particular, the instant invention produces redundant clock signals which have low skew with respect to each other, operate with extremely high accuracy, and can be constructed without use of analog electric components, with the exception of oscillators. The present fault tolerant clock is composed of three types of electrical subcircuits coupled together: oscillators/counters, sequential edge voters, and regular voters. Each of these cubcircuits can be duplicated and coupled appropriately as needed to form a clock mechanism tolerant of any number of faults in the clock circuitry while maintaining an extremely precise timing mechanism suitable for accurately integrating and differentiating signals with respect to time.
申请公布号 CA2197330(A1) 申请公布日期 1996.02.22
申请号 CA19952197330 申请日期 1995.08.10
申请人 HONEYWELL INC. 发明人 DRISCOLL, KEVIN R.
分类号 G06F1/04;G06F1/10;G06F1/14;G06F11/18;H03L7/08;H04L7/00;(IPC1-7):G06F11/18 主分类号 G06F1/04
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