发明名称 |
Memory addressing method and apparatus therefor |
摘要 |
A memory addressing method and apparatus therefor having a pair of cell blocks is characterized in that the pair of cell blocks are alternately column-addressed in such a manner that the column line of one cell block is pre-charged while the column line of the other cell block is addressed, and that subsequently, the pre-charged column line of the other cell block is addressed while the next column line of the one cell block is pre-charged. Therefore, the memory device wherein a plurality of cell blocks are alternately addressed can achieve an approximately doubled speed of operation.
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申请公布号 |
US5493535(A) |
申请公布日期 |
1996.02.20 |
申请号 |
US19940361229 |
申请日期 |
1994.12.21 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHO, JUN-HYOUNG |
分类号 |
G11C11/401;G06F12/06;G11C7/10;G11C7/12;G11C8/00;(IPC1-7):G11C13/00 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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