SELF-TIMING ADJUSTMENT-TYPE INTERFACE

摘要

PURPOSE: To provide a self-timing adjustment type interface(STI) in which bit serial data are clocked in parallel on a conductive bus by a clock signal, and this clock signal is transmitted on the different lines of the bus. CONSTITUTION: Data received on the different lines of a bus are individually phase-matched with a clock signal. The received clock signal is used for separately defining the boundary edge of a data bit cell on each line, and the data on each line of the bus are separately phase-synchronized so that, for example, a clock transition position can be the center of the data cell.