| 摘要 |
PURPOSE:To perform operation fast with a small memory quantity and small power consumption when data in bit units which are saved in plural words are put together in one word. CONSTITUTION:This arithmetic unit is equipped with a multiplexer 3, a latch 5, a 1-bit right shifter 7, and a multiplexer 8, and the output of the shifter 7 is inputted to the same latch 5 in a next machine cycle. A multiplier 11 multiplies the output of the multiplexer 8 by a multiplicator. A number which consists of 1 as only the most significant digit bit and 0's as the remaining bits is inputted first as a multiplicand and subsequent numbers are shifted by the shifter 7 to the right, so a data series can be generated through hardware. |
