MEMORY-ARRAY-CELL READ CIRCUIT

摘要

PURPOSE: To realize high rate reading by providing a reference cell with additional current branches including a parallel transistor(TR) thereby setting the ratio between cell current and reference current higher at the time of equivalent step than at the time of evaluation step. CONSTITUTION: Bit line 5 and reference line 11 of a read circuit 1 are precharged with precharge circuits 4, 10 before an equivalent step and following evaluation step are carried out and the content stored in a cell 6 is read out through a sense amplifier 17. This circuit 1 is additionally provided with a current branch 31 comprising additional current TR 43, TR 44 having one end grounded through a line 11 and the other end grounded through a switching transistor 44 and the ratio between cell current and reference current on the lines 5, 11 is set higher at the time of equivalent step than at the time of evaluation step. Consequently, the current of a load means 8 is controlled quickly at the time of evaluation step and high rate reading is realized.