发明名称 METHOD AND CIRCUIT FOR LOADING TIMING OF OUTPUT DATA OF NONVOLATILE MEMORY
摘要 <p>PURPOSE: To set a timing accurately while suppressing noise by loading a simulate signal to an output simulation circuit through a switch subjected to required control and resetting a simulate generation circuit in response to the variation of simulate signal. CONSTITUTION: Upon provision of a sync signal SYNC, a simulate signal SP is generated from the simulate signal generator 34 of delay FF and a load block signal SS makes a transition to L through a switch 35 opened by a load enable signal L before being loaded to an unblocked output simulation circuit 21. When the signal SP is inverted to 'L', output is inverted to H through a NAND gate 30 and an inverter 32 and the generator 34 is reset instantaneously through a monostable multivibrator 33. On the other hand, a signal SS is inverted to H and loading to the circuit 21 is blocked. According to the circuitry, loading of signal and blocking of loading are controlled accurately and the effect of noise due to housing is suppressed.</p>
申请公布号 JPH0845289(A) 申请公布日期 1996.02.16
申请号 JP19950053776 申请日期 1995.02.20
申请人 SGS THOMSON MICROELETTRONICA SPA 发明人 RUIIJI PASUKATSUCHI;MARUKO MATSUKAROONE;MARUKO ORIBUO
分类号 G11C17/00;G11C7/00;G11C7/02;G11C7/10;G11C7/22;G11C16/06;G11C16/32;(IPC1-7):G11C16/06 主分类号 G11C17/00
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