发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS DATA ERASING METHOD
摘要 <p>PURPOSE:To prevent an over-erasure cell from being generated by controlling threshold values of memory cell transistors at the time of erasing a nonvolatile semiconductor memory capable of being electrically erased. CONSTITUTION:This device has a positive potential impressing circuit 13 making potentials of control gates higher than a grounding potential. Then, the over- erasure cell 27 is prevented from being generated by controlling the distribution of threshold voltages of memory cells at the time of an erasing to a direction in which the threshold value is high.</p>
申请公布号 JPH0845286(A) 申请公布日期 1996.02.16
申请号 JP19940177870 申请日期 1994.07.29
申请人 NEC KYUSHU LTD 发明人 WAKITA SHINICHI
分类号 G11C17/00;G11C16/04;G11C16/06;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/06;H01L21/824 主分类号 G11C17/00
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