| 摘要 |
<p>A level converting circuit comprising a p-channel field effect transistor (11) for receiving signals at a GTL interface level and an npn bipolar transistor (14), wherein the field-effect transistor (11) and the bipolar transistor (14) are connected between their source and drain to form a level conversion output node and the two transistors are also connected between their drain and base. The field-effect transistor (11) converts the level of the input signals, i.e., the GTL interface level, into a level at which the transistor (14) operates and further raises the converted level. Therefore, the GTL interface level can be converted into a higher level at a high speed.</p> |
