Sensor bus system with series identical sec. stages

摘要

The output of a transfer storage (r1) is connected with the input of an output of a buffer storage (r2). The transfer unit (w,tr,sw,st), coupled during a take-over interval (mr) and during a shift interval (s1,s2,s3), connects the input of the output buffer (r2) at the output of the transfer storage (r1), and separates outside of the measurement interval (m), the transfer storage (r1) from the sensor unit (su) and connects the input of the transfer storage with an input terminal (3) of the sec. stage (Si).