发明名称 Sampling and holding circuit
摘要 <p>An analog input voltage is inputted to the first sampling and holding circuit and the second sampling and holding circuit is connected to an output of the first sampling and holding circuit. The output of the first and second sampling and holding circuits are inputted to a multiplexer which alternatively outputs the output of first sampling and holding circuit or the second sampling and holding circuit. When one of the first and second sampling and holding circuits is refreshed, the output of the other sampling holding circuit is selected to be outputted from the multiplexer. &lt;MATH&gt;</p>
申请公布号 EP0696804(A2) 申请公布日期 1996.02.14
申请号 EP19950112410 申请日期 1995.08.07
申请人 YOZAN INC.;SHARP KABUSHIKI KAISHA 发明人 SHOU, GUOLIANG;MOTOHASHI, KAZUNORI;YAMAMOTO, MAKOTO;TAKATORI, SUNAO
分类号 G11C27/02;(IPC1-7):G11C27/02 主分类号 G11C27/02
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