发明名称 Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories
摘要 The amplifier device includes a bistable differential amplifier, a dual-slope circuit, and pre-charge transistors (34,35). The dual slope circuit enables sensing of differential voltage by the bistable differential amplifier. The precharge transistors precharge at least the dual-slope circuit and the amplifier inputs in sequence. A latch circuit combined with the dual slope circuit causes latching of outputs of the differential amplifier. The precharge transistors are also reset the latch circuit.
申请公布号 EP0696802(A2) 申请公布日期 1996.02.14
申请号 EP19950111058 申请日期 1995.07.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 REOHR, WILLIAM ROBERT;CHAN, YUEN HUNG;LU, PONG-FEI
分类号 G11C11/41;G11C7/06;G11C8/10;G11C11/419;H01L21/822;H01L27/04;H01L27/10;H03F3/45;H03K19/003 主分类号 G11C11/41
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