| 摘要 |
<p>A circuit for protecting an interconnect line from certain undesirable voltage swings for a given input signal. A transmission gate is coupled in series between the input signal and the interconnect line. The transmission gate's input terminal is coupled to the input signal, its output terminal is coupled to the interconnect line, and its control terminal is coupled to the output of an inverter. The input of the inverter is coupled to the input signal. When the input signal transitions to a voltage that exceeds the trip point of the inverter, the inverter outputs a signal that disables the transmission gate such that the node is isolated from the input signal. A PFET transmission gate is utilized for protection against voltages that are too negative, and an NFET transmission gate is utilized for protection against voltages that are too positive. The inverter may be replaced by a comparator having its positive input coupled to a reference voltage and its negative input coupled to the input signal. The reference voltage determines the trip point of the protection circuit. The protection circuit may also include first and second biased MOS devices (having different channel types) coupled between first and second working potentials. The gate of the first MOS device is coupled to the input signal and the gate of the second MOS device is coupled to the output of the inverter. The MOS devices function as a conductive voltage divider network to establish a voltage on the node when the node is isolated from the input signal.</p> |
