发明名称 |
Semiconductor device including signal generating circuit with level converting function and with reduced area of occupation |
摘要 |
A semiconductor memory device includes a pull up circuit (811) for pulling up a potential of a first node (812), a pull down circuit (813) for pulling down the potential of the first node, an inverter circuit (814b) having its input connected to a first input node (814a) connected to the first node (812) and its output connected to a first output node (814c) and operating with a boosted potential Vpp, and a p channel MOS transistor (814d) connected between a boosted potential node (50c) and the first input node (814a), with its gate electrode connected to the first output node (814c). The memory device provides a signal having a higher level than the supply potential with smaller area of layout.
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申请公布号 |
US5490119(A) |
申请公布日期 |
1996.02.06 |
申请号 |
US19940229274 |
申请日期 |
1994.04.18 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA;MITSUBISHI ELECTRIC ENGINEERING CO., LTD. |
发明人 |
SAKURAI, MIKIO;TOKAMI, KENJI;SAKEMI, KAZUHIRO;IKEDA, YUTAKA;INOUE, YOSHINORI;KAJIMOTO, TAKESHI |
分类号 |
G11C11/418;G11C8/08;G11C8/12;G11C11/401;G11C11/407;G11C11/408;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/418 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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