发明名称 DECISION CIRCUIT AND DECIDING METHOD FOR BUFFER MEMORY READ SEQUENCE
摘要 <p>PURPOSE:To suppress a delay in reading of a cell while securing a band limit of the cell and suppression of CDV. CONSTITUTION:The buffer memory read sequence decision circuit 10 is provided with a read sequence storage means 13 storing a read sequence of various cells to decide the read sequence of cells to be outputted from a buffer memory. A cell read interval decision means 11 deciding an interval to read a cell of the kind when the read cell is other than idle cell in the read sequence revises cell read interval depending whether or not the cell of the kind read by read sequence read control means 14, 15 is in existence in the buffer memory. When M kinds of cells decided substantially as the same sequence are read sequentially and N (N<=M-1) cells just after the M kinds of cells are idle cells, the read sequence of the cells and reading itself are omitted by skip means 15 to 17.</p>
申请公布号 JPH0832590(A) 申请公布日期 1996.02.02
申请号 JP19940163543 申请日期 1994.07.15
申请人 OKI ELECTRIC IND CO LTD 发明人 KARASAWA SATOSHI
分类号 H04Q3/00;H04L12/28;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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