| 摘要 |
<p>PURPOSE:To suppress the generation of noise and variation in power supply at the time of switching an address signal by counting the number of non- coincident bits between 1st and 2nd logic signals outputted from a register and controlling the register based upon the count value. CONSTITUTION:A comparator 14 compares a previously set prescribed number with the numbers of non-coincident bits between 1st and 2nd address signals A'15 to A'0, A15 to A0. When the number of non-coincident bits exceeds the prescribed value, the comparator 14 outputs an 'H' level signal to an output terminal E0. When the level of a signal inputted to an input terminal W of a control part 15 is an 'L' level, the control part 15 simultaneously outputs control signals for instructing the storage of the 2nd address signals A15 to A8, A7 to A0 in respective registers 11a, 11b from its output terminals OUT1, OUT2, and when the inputted signal is an 'H' level, sequentially outputs control signals for instructing the storage of the 2nd address signals A15 to A8, A7 to A0 in the registers 11a, 11b at the shifted timing.</p> |
