发明名称 FRAME SYNCHRONIZATION PROTECTION CIRCUIT
摘要 <p>PURPOSE:To obtain the frame synchronization protection circuit protecting frame synchronization without absence of an external input. CONSTITUTION:A clock counter 3 receives a clock synchronously with a bit stream signal and counts number of clocks. A frame length storage circuit 5 stores number of clocks from the first coincidence between frame synchronizing signals till the 2nd frame length and a reference frame coincidence as a tentative one frame length and a reference frame length. A frame length comparator circuit 6 compares the count value and the reference frame length as to whether or not they match and provides a frame length matching pulse when the both match and provides an output of a frame synchronizing signal comparison result valid flag when the count reaches a value estimated to be a length of a succeeding frame synchronizing signal. A forward/backward protection circuit 7 protects frame synchronization by regarding only the output comparison result of a frame synchronizing signal comparator circuit 1 receiving the frame synchronizing signal comparison result valid flag.</p>
申请公布号 JPH0832573(A) 申请公布日期 1996.02.02
申请号 JP19940185277 申请日期 1994.07.14
申请人 NEC CORP 发明人 FUKUHARA KENJI
分类号 H04J3/06;H04L7/08;H04L25/40;(IPC1-7):H04L7/08 主分类号 H04J3/06
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