发明名称 Semiconductor memory device including bit check function and testing method using the same
摘要 The semiconductor memory device includes word lines, bit line pairs crossing the word lines, memory cells disposed, a row decoder, and sense amplifiers. The device further includes a plurality of comparing circuits, a plurality of control circuits, and a determination signal generating circuit. Each comparing circuit compares a data signal read out from the corresponding memory cell with a reference signal externally applied when the reference signal is at an H level, and generates a result signal indicating whether or not the data signal matches the reference signal. Each control circuit carries out control so that a result signal from the comparing circuit indicates a match irrespectively of whether or not the data signal matching the reference signal when the reference signal is at an L level. The determination signal generating circuit generates a determination signal indicating a match when all of the results signals from the comparing circuits indicate a match, and generates a determination signal indicating a mismatch when any of the result signals from the comparing circuits indicates a mismatch.
申请公布号 US5488578(A) 申请公布日期 1996.01.30
申请号 US19940296395 申请日期 1994.08.26
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 YAMADA, AKIRA
分类号 G11C11/413;G11C15/00;G11C15/04;G11C29/00;G11C29/10;G11C29/34;G11C29/38;(IPC1-7):G11C15/00 主分类号 G11C11/413
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