发明名称 |
BUS MASTER INTERFACE CIRCUIT WITH TRANSPARENT PREEMPTION OF A DATA TRANSFER CONTROLLER |
摘要 |
A plurality of specialized controllers, each one adapted to control a particular type of data transfer operation, control the flow of data between a system bus and a local bus on a computer adapter card. When the Direct Memory Access (DMA) controller is controlling a DMA operation on the local bus, certain other controllers can break-in to the current DMA operation, temporarily halting the DMA operation until the other controller has completed its data transfer operation. To break-in to a DMA operation, handshaking signals between the DMA controller and the local bus interface circuit are temporarily blocked by blocking signals from a break-in logic circuit. The break-in circuit includes a four-state state machine to block the handshaking signals at the appropriate times, and to signal the interrupting controller to begin its data transfer operation. When breaking-in to a DMA operation in this manner, the operation of the DMA controller is not altered; instead, to the DMA controller, it appears that the local bus interface circuit is merely slow to respond with its acknowledge handshake.
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申请公布号 |
CA2026737(C) |
申请公布日期 |
1996.01.23 |
申请号 |
CA19902026737 |
申请日期 |
1990.10.02 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GARCIA, SERAFIN J. E., JR.;CHISHOLM, DOUGLAS R.;KALMAN, DEAN A.;PADGETT, RUSSELL S.;YODER, ROBERT D. |
分类号 |
G06F13/32;G06F13/362;(IPC1-7):G06F13/24 |
主分类号 |
G06F13/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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