| 发明名称 |
Method of forming multilayered wiring structure in semiconductor device |
| 摘要 |
A method of forming a via structure having good characteristics in a semiconductor device having a multilayered wiring structure includes forming a thin film including a high melting point metal or a high melting point metal compound on at least the side wall of a via hole before a via plug including Al or an Al alloy is formed.
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| 申请公布号 |
US5486492(A) |
申请公布日期 |
1996.01.23 |
| 申请号 |
US19930142971 |
申请日期 |
1993.10.29 |
| 申请人 |
KAWASAKI STEEL CORPORATION |
发明人 |
YAMAMOTO, HIROSHI;TAKEYASU, NOBUYUKI;OHTA, TOMOHIRO |
| 分类号 |
H01L21/768;(IPC1-7):H01L21/285;H01L21/306 |
主分类号 |
H01L21/768 |
| 代理机构 |
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