发明名称 Trench EEPROM with tunnel oxide in trench
摘要 A floating gate EPROM has surface source and drain regions, with a trench between the source and drain regions containing the floating and control gates. A thin tunneling oxide layer is located at the bottom of the trench and on the sidewalls of the trench adjacent the source and drain regions, with thicker gate oxide elsewhere in the trench.
申请公布号 US5486714(A) 申请公布日期 1996.01.23
申请号 US19950445939 申请日期 1995.05.22
申请人 UNITED MICROELECTRONICS CORPORATION 发明人 HONG, GARY
分类号 H01L21/8247;(IPC1-7):H01L27/115 主分类号 H01L21/8247
代理机构 代理人
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