发明名称 PARALLEL COMPUTER
摘要 <p>PURPOSE:To provide a parallel computer with a decentralized common memory which eliminates the need for a memory for the directories of respective processing units without lowering the parallel throughput. CONSTITUTION:Data on a main storage are cached in the cache of its PU. For data of other PUs, other main storages are accessed directly without using caches. When the line on the main storage is accessed and read by other PUs, a flash command is sent out to the cache of its PU. Respective lines of the caches are provided with a means (D:22) which stores alterations of lines and when data in a cache are altered, the latest data are written back to the main storage. At the time of write address, the data in the cache are purged simultaneously with the writing-back operation. Further, the respective lines of the main storage are provided with bits indicating that the lines are cached by their PUs and this operation is performed only when it can be decided that the lines are cached on the main storage sides.</p>
申请公布号 JPH0816469(A) 申请公布日期 1996.01.19
申请号 JP19940168721 申请日期 1994.06.28
申请人 HITACHI LTD 发明人 TARUI TOSHIAKI;SUKEGAWA NAONOBU;AKASHI HIDEYA;FUJII KEIMEI
分类号 G06F15/17;G06F12/08;G06F15/163;(IPC1-7):G06F12/08 主分类号 G06F15/17
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