ERROR PROCESSING METHOD OF SMALL-SIZED INFORMATION PROCESSOR

摘要

PURPOSE:To easily perform development and maintenance without being affected by an OS by actuating an error processing routine by non-maskable interruption and performing system management error processing by system management interruption. CONSTITUTION:A CPU 1 which has the system management interruption(SMI) higher in priority than the non-maskable interruption(NMI) makes a parity check at the time of read of a memory 5 and informs an error control part 9 of an parity error with a PCHK# signal 10 indicating the parity error and the error control part 9 while outputting an NMI signal 11 to the CPU 11 inverts this signal to equalize the polarity for the initiation of the system management interruption and inputs the signal to the CPU 1 as an SMI# signal 12. The CPU 1 switches the operation to a system management mode at a next instruction border where the SMI# signal 12 becomes active. Therefore, the SMI is disconnected from normal operation including the NMI and the error processing can be described without depending upon the OS.