发明名称 METHOD AND APPARATUS FOR GENERATING INSPECTION SERIES
摘要 PURPOSE:To generate a short inspection series at high rate by generating an inspection input of a target failure and effecting a failure simulation thereby removing a detectable failure from the inspection series generation object. CONSTITUTION:A target failure (b) is selected among a plurality of undetected, unprocessed inspection series generation objects with reference to a failure table and the inspection input generation of the failure (b) is effected to set a logical 0 or 1 at an external input pin 402. Consequently, the influence of the failure (b) propagates to an external input pin 401. A don't care external input pin 401 is left as it is. A failure simulation is then executed using the inspection input pattern of the failure (b) thus detecting failures (b), (g) by means of the pin 403 and a failure (e) by means of an external output pin 404. The failure table is updated according to the detection results and the failures (b), (e), (g) are removed from the inspection series generation object thus decreasing the number of failures for which the inspection series is generated. Since the number of inspection input patterns in a compression buffer can be decreased, a short inspection series can be generated at high rate.
申请公布号 JPH0815388(A) 申请公布日期 1996.01.19
申请号 JP19940144837 申请日期 1994.06.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HOSOKAWA TOSHINORI;MOTOHARA AKIRA
分类号 G01R31/3183;G06F11/22;G06F17/50 主分类号 G01R31/3183
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