Semiconductor memory device having a structure for driving input/output lines at a high speed

摘要

A semiconductor memory device for alternately selecting two groups of input/output lines according to a predetermined column address. A first group of a number of the input/output line pairs is driven by activation of any one of the selection signals within the first group, and a second group of a number of the input/output line pairs is driven by activation of any one of the selection signals within the second group. Furthermore, the input/output line pairs within the second group are precharged and equalized when the input/output line pairs within the first group are driven, and the input/output line pairs within the first group are precharged and equalized when the input/output line pairs within the second group are driven.