发明名称 Method for testing printed wiring boards for short circuits
摘要 A test pattern preparation unit divides output pins of each circuit element mounted on a printed wiring board into a group to which a logical value 0 is assignable and a group to which a logical value 1 is assignable, to thereby prepare a test pattern for detecting short-circuit failures between the groups. If short-circuit failures are undetectable among output pins in a given group, these output pins are further divided into a group to which the logical value 0 is assignable and a group to which the logical value 1 is assignable. In this way, the output pins are repeatedly divided into groups, to form test patterns for detecting short-circuit failures. These test patterns are applied to the board through a tester to detect short-circuit failures.
申请公布号 US5485094(A) 申请公布日期 1996.01.16
申请号 US19940214317 申请日期 1994.03.17
申请人 FUJITSU LIMITED 发明人 ENDOH, CHIHIRO;TADA, TOSHIHIKO
分类号 G01R31/02;G01R31/3183;(IPC1-7):G01R31/28;G06F11/22 主分类号 G01R31/02
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