发明名称 Test point reduction system for a printed circuit board test system
摘要 A system for reducing the number of points to be tested on a printed circuit board where the printed circuit board includes a plurality of network traces each having end points and a plurality of pads provides for the identification of the end points of each network trace of the plurality of network traces. Certain ones of the plurality of network traces network located within a predetermined distance of one another are grouped to form a plurality of groups of network traces. The identified end points of the grouped network traces are connected together within each group of network traces to form a continuous trace having one pair of end points for each group of network traces. The end points are used for testing the printed circuit board.
申请公布号 US5485081(A) 申请公布日期 1996.01.16
申请号 US19920883160 申请日期 1992.05.14
申请人 ELECTRONIC PACKAGING CO. 发明人 WHITEHEAD, ROBERT E.;EVANS, EVAN J.;FOSTER, STEPHEN J.
分类号 G01R31/28;H05K1/00;H05K1/02;H05K1/11;H05K3/00;(IPC1-7):G06F3/06 主分类号 G01R31/28
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