| 摘要 |
PURPOSE:To reduce circuit scale and to decrease the number of wiring patterns by setting a digital signal at a minimum value when binarized data first become '1' and setting the digital signal at a maximum value when the binarized data finally become '1' after they continue CONSTITUTION:Since an F/F 2 turns an opposite phase output into '1' in an initial state, when a binarization processor 33 first turns its output into '1', the latch command of an F/F 4 is outputted from a gate 3, and Y coordinate data at that time are fetched into the F/F 4. Since the F/F 2 turns the opposite phase output '0b corresponding to the first input of '1', even when the '1' is inputted later, the gate 3 is closed and the latch command is not outputted to the F/F 4. These first fetched Y coordinate data are the minimum value. On the other hand, an F/F 5 fetches the Y coordinate data each time '1' is inputted but since the binarization processor 33 finally turns the output to '1' just before vertical scanning passes through a target point, as a result, the maximum value on a Y coordinate is held. |
