发明名称 MICROCOMPUTER
摘要 PURPOSE:To provide a data processor capable of evading increment of the number of terminals and monitoring execution addresses in an internal memory from an external terminal without damaging other terminal functions and reducing a real time property. CONSTITUTION:When a mode switching signal 6-4 is '1', an internal ROM address signal. selecting signal 5-1 generated from a select signal generating part 6 is turned to '1', a selector 5 selects an internal ROM address bus 9-1 and internal ROM address information is outputted from an address/data terminal 8. In this case, the signal 5-1 is turned to '0' at external access bus cycle timing and external address/data are inputted/outputted to/from the terminal 8. When the signal 6-4 is '0', the device is driven by a normal mode and the external address/data are inputted/outputted to/from the terminal 8.
申请公布号 JPH086918(A) 申请公布日期 1996.01.12
申请号 JP19940155471 申请日期 1994.06.15
申请人 NEC CORP 发明人 TOKIEDA YUSUKE;KATSUTA HIROSHI
分类号 G06F11/28;G06F11/36;G06F15/78 主分类号 G06F11/28
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