| 摘要 |
PURPOSE:To verify a system including a logic circuit, a CPU, and its program without making a board for evaluation by providing a simulation part with an ICE control function and a transmitting and receiving function for data. CONSTITUTION:A simulation core 14 once obtaining data to be inputted to the CPU from a memory 13 passes the process to an ICE driver 14b and stores the data in a memory 21a. At interface part 20, a timing address control part 23 outputs the data from the memory 21a to an ICE 30, which performs simulation and also stores the result in a memory 21b. The ICE driver 14b reads the data out of the memory 21b and returns the process to the simulation core 14, thus completing the simulation. |
