发明名称 BIPOLAR CLOCK DISTURBANCE DETECTION CIRCUIT
摘要 <p>PURPOSE:To make it possible to detect the abnormality of any bipolar clock by deciding that the bipolar clock is abnormal when the generation timing of detected violation is not matched with a prescribed timing pattern. CONSTITUTION:The outputs of positive and negative polarity pulse detection circuits 11 and 12 are inputted in a violation detection circuit 15 via a logical OR circuit 14. The circuit 15 detects the violation between the output signals SPLUS and SMINUS of the circuits 11 and 12 by defining a signal SCLOCK as a clock. When the output signal SOUT of the circuit 15 is inputted in a counter 16, a count-up is performed by synchronizing with the signal SCLOCK and the circuit 15 outputs the signal according to violation locations, a count value is reset. When an alarm detection circuit 17 monitors the count value of the counter 16 and the counter 16 is reset by a value which is different from that at a normal time, an alarm showing an abnormality is outputted when the reset is not performed in the timing that the violation should be generated.</p>
申请公布号 JPH088752(A) 申请公布日期 1996.01.12
申请号 JP19940132764 申请日期 1994.06.15
申请人 NEC CORP 发明人 TAKAHASHI YASUNORI
分类号 G06F1/04;H03K5/19;H03M5/16;(IPC1-7):H03M5/16 主分类号 G06F1/04
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