| 摘要 |
<p>PURPOSE:To synchronize an asynchronizing signal to a clock to securely output them by providing a coincidence detection circuit and detecting that the output of a first syncrhonization circuit and that of a second synchronization circuit are equal for respective bits. CONSTITUTION:The asynchronizing signal is synchronized by the clock of the first synchronization circuit 11 and it is furthermore synchronized by the second synchronization circuit 12 by the clock whose fetching timing is different from the first synchronization circuit 11. Output signals from the first and second synchronization circuits are inputted to the coincidence detection circuit 13 and it is investigated whether respective bits of plural bits are accurately fetched or not. When the output signals of the first and second synchronization circuits coincide, a third synchronization circuit 14 outputs the synchronizing signal. Since the timing of the clock for fetching the asynchronizing signal differs in the first and second synchronization circuits even if the change periods of respective bits of the asynchronizing signals slightly differ, the asynchronizing signal can accurately be shycnronized in one of the circuits.</p> |
