| 摘要 |
<p>A pin grid array socket connector for connection to a plurality of pins (11,12) in a CPU chip (10) has a plurality of socket contacts (19,20) each socket contact having a pair of contact arms (23,24:25,26). Each arm has a contact point (30,31,32,33) adjacent a free and thereof, the contact points of each contact being staggered such that, in use, a particular pin of the CPU chip does not make initial contact with both the contact points of the associated contact simultaneously. Adjacent contacts (19,20) are positionally staggered with respect to each other such that, in use, the associated pair of CPU chip pins (11,12) does not make initial contact simultaneously with more than one contact point. <IMAGE></p> |
