发明名称 Virtual address to physical address translation cache that supports multiple page sizes
摘要 A method and apparatus for translating a virtual address to a physical address. A virtual address to be translated has a virtual page offset and a virtual page number. The virtual address to be translated addresses a page of memory. The size of this page is unknown. There are L different possible page sizes where L is a positive integer greater than one. Each of the L different page sizes is selected to be a test page size and a test is performed. During the test, a pointer into a translation storage buffer is calculated. The pointer is calculated from the virtual address to be translated by assuming that the virtual address to be translated corresponds to a mapping of the test page size. The pointer points to a candidate translation table entry of the translation storage buffer. The candidate translation table entry has a candidate tag and candidate data. The candidate tag identifies a particular virtual address and the candidate data identifies a particular physical address corresponding to the particular virtual address. A virtual address target tag is extracted from the virtual address to be translated. The virtual address target tag is calculated by assuming that the virtual address to be translated corresponds to a mapping of the test page size. The target tag and the candidate tag are then compared. If the target tag matches the candidate tag, the candidate data is provided as the physical address translation corresponding to the virtual address to be translated.
申请公布号 US5479627(A) 申请公布日期 1995.12.26
申请号 US19930118398 申请日期 1993.09.08
申请人 SUN MICROSYSTEMS, INC. 发明人 KHALIDI, YOUSEF A.;ANDERSON, GLEN R.;CHESSIN, STEPHEN A.;KONG, SHING I.;NARAD, CHARLES E.;TALLURI, MADHUSUDHAN
分类号 G06F12/10;(IPC1-7):G06F12/10 主分类号 G06F12/10
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