发明名称 |
Semiconductor memory device employing sense amplifier control circuit and word line control circuit |
摘要 |
A semiconductor memory device capable of reducing power consumption has a memory cell array, a plurality of address lines, a pair of data lines, an address transition detector circuit for outputting an address transition signal in response to a change in a signal on the address line, a sense amplifier, a sense amplifier control circuit for activating the sense amplifier in response to the address transition signal and deactivating the sense amplifier in response to the sense amplifier output signal, and a word line control circuit which deactivates the word lines within the memory cell array in response to the sense amplifier control circuit.
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申请公布号 |
US5479374(A) |
申请公布日期 |
1995.12.26 |
申请号 |
US19940279684 |
申请日期 |
1994.07.25 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KOBAYASHI, TSUGUO;SHIROTORI, TSUKASA;NOGAMI, KAZUTAKA |
分类号 |
G11C11/419;G11C7/22;G11C8/18;G11C11/407;G11C11/409;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/419 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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