Testing device for integrated circuits on wafer

摘要

An electrical testing device is provided for testing integrated circuits located on a wafer. The testing device employs a multi-layer test circuit having a plurality of contacts for contacting the integrated circuits on a wafer. The layers of the test circuit are embedded in a flexible transparent dielectric material which allows vertical flexing of the contacts and visual transparency through the circuit. Alignment markers are provided on the circuit and wafer and one or more viewing tubes may be used to allow a user to view the alignment markers so as to bring the circuit into proper alignment with the wafer. A microscope may further be employed with each viewing tube to provide accurate alignment examination. A stretching fixture is mounted on the circuit which enables a user to stretch the circuit to achieve a larger size when necessary.