发明名称
摘要 <p>PURPOSE:To obtain a high precise solution within an arbitrary optimizing time by preferentially selecting a valid arrangement data converting means with a high probability according to an applied optimizing time, in an important combination optimizer in each kind of design program, especially the design of a logic circuit. CONSTITUTION:An arrangement data optimizing means 12 starts a retrieval based on initial arrangement data prepared by an initial arrangement data preparing means 11, selects one of plural arrangement data converting means held by an arrangement data conversion rule storage means 13 based on a selectivity held by a conversion rule selectivity storage means 14, and repeats a conversion. The selectivity held by the conversion rule selectivity storage means 14 is dynamically updated by an adjustment value held by the conversion rule selectivity adjustment value storage means 15, and the valid arranged data converting means can be preferentially selected with the high probability according to the applied optimizing time, so that the high precise solution can be obtained within the arbitrary optimizing time.</p>
申请公布号 JPH07122884(B2) 申请公布日期 1995.12.25
申请号 JP19920240113 申请日期 1992.08.18
申请人 发明人
分类号 H01L21/82;G06F17/50;G06F19/00;G06Q10/04 主分类号 H01L21/82
代理机构 代理人
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