发明名称 |
MULTIPROCESSOR EMULATION SYSTEM |
摘要 |
PURPOSE: To reduce high speed process cost from the initial design of a chip to the verification by providing a bus control means for transmitting data from an arbitrary emulation processor to a bus means through a connected multiplexer under the control of a software signal stored in an incorporated control storage. CONSTITUTION: The emulation processors contain the control storage and the two incorporated memory arrays of data stacks and they have entries 128. The respective emulation processors access to control words defining operations executed during a step by means of step values. Respective emulation processor control programs are loaded in the incorporated control storage of the emulation processors prior to emulation. Data are transmitted from the sixty four arbitrary emulation processors on the bus means under software signals stored in the incorporated storages. |
申请公布号 |
JPH07334384(A) |
申请公布日期 |
1995.12.22 |
申请号 |
JP19950094674 |
申请日期 |
1995.04.20 |
申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
UIRIAMU FURANSHISU BIYUUSOREIRU;TAKUUUON N;HARORUDO RICHIYAADO PAAMAA |
分类号 |
G06F11/22;G06F17/50 |
主分类号 |
G06F11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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