| 摘要 |
PURPOSE:To realize a MO two-quadrant multiplier which is formed in a semiconductor integrated circuit and has a linear input voltage range with a comparatively small circuit scale. CONSTITUTION:A first transistor pair has the third transistor pairs as loads, which are cascade-connected, and the second transistor pair constituting a quadritail cell is commonly connected to the respective drains of the first transistor pair at its respective gates, the respective gates of either the first transistor pair or the third transistor pair are commonly connected, a control voltage is impressed on them and a differential input signal is impressed on the respective gates of the other transistor pair. |
