| 摘要 |
PURPOSE:To provide a parallel conversion circuit for serial digital data in which the load of signal processing by a CPU at a post-stage is relieved and which copes with analog 2-channel input signals related to each other. CONSTITUTION:This circuit is provided with 1st and 2nd sample-and-hold circuits 5, 6 sampling simultaneously two channel analog input signals, an A/D converter applying digital conversion to at first a holding signal by the 1st sample-and-hold circuit 5 and applying digital conversion to then a holding signal by the 2nd sample-and-hold circuit 6, 1st and 2nd shift registers 2a, 2b converting digital data converted first and second by the A/D converter 7 respectively into parallel data, and a control section 8 controlling a CPU 4 to continuously read the parallel conversion data by the 1st and 2nd shift registers 2a, 2b. |
