MAMORY APPARATUS FOR HD-MAC DECODER

摘要

The memory device of HD-MAC decoder using necessary field memories in common to simplify and reduce the structure, includes: a reverse MCCI(motion compensated compatibility improvement) processor(31) performing reverse process of MCCI with image data and compensation data of 1 field delayed motion vector; a reverse TCI(temporal compatibility Improvement) processor performing reverse process of TCI with 2 field delayed image data, a deshuffler(38) performing deshuffling process with 1,2, and 3 delayed image data; field memories(34,36,37) delaying image data in sequence; a delay circuit(35) delaying image data as much as 1 filed; and a controller(59) generating reset signal for performing correct delay.