发明名称 |
Frequency-adjustable ring oscillator |
摘要 |
<p>A clock generation circuit includes a reference clock for putting out a stable reference clocking signal. A digital ring oscillator includes a series circuit loop having at least one inverting gate and a programmable delay line of plural delays formed a series of tapped digital transmission gates connected between an output and an input of the inverting gate. A multiplexer selects among the series of taps in accordance with a tap selection signal. A clock monitoring circuit is connected to compare the clock output with a stable reference clocking signal to produce a digital clock cycle count. A programmed microcontroller generates the tap selection value as a function of the digital clock cycle count and a desired clock output frequency set point. And, a synchronization circuit synchronizes tap selection value applied to the multiplexer in relation to the present, adjustable clocking signal, and to a logical state of a successor, adjustable clocking signal to be put out by the digital ring oscillator following the tap selection, in order to avoid glitches and without interrupting oscillation. <IMAGE></p> |
申请公布号 |
EP0687064(A1) |
申请公布日期 |
1995.12.13 |
申请号 |
EP19950303372 |
申请日期 |
1995.05.19 |
申请人 |
QUANTUM CORPORATION |
发明人 |
HENSON, JAMES A.;AKIN, WILLIAM R., JR.;RICHMOND, SCOTT, E. |
分类号 |
H03K3/02;G06F1/08;H03K3/03;H03K3/78;H03L7/06;H04L7/00;H04L7/033;(IPC1-7):H03K3/03 |
主分类号 |
H03K3/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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