发明名称 |
Cache memory utilizing pseudo static four transistor memory cell |
摘要 |
A four transistor memory cell having a pair of cross coupled transistors and a pair of pass gates is disclosed. The four transistor memory cell is refreshed by charge transfer between the bit lines the internal nodes during bit line precharge.
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申请公布号 |
US5475633(A) |
申请公布日期 |
1995.12.12 |
申请号 |
US19940252320 |
申请日期 |
1994.06.01 |
申请人 |
INTEL CORPORATION |
发明人 |
MEHALEL, MOTY |
分类号 |
G11C11/403;G11C11/412;G11C11/56;G11C15/04;(IPC1-7):G11C11/34;G11C7/00 |
主分类号 |
G11C11/403 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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