| 摘要 |
<p>PURPOSE:To reduce maximum detection time by detecting a multi-frame identification code from a bit stream having a already been stored and hold. CONSTITUTION:The system is made up of a cyclic counter 1 incremented for each bit of a bit stream and runs freely by using a bit number of 1 multi-frame for an upper limit, a memory circuit 5 storing the bit stream, a counter 2 counting a bit number of the bit stream, a control circuit 4 writing the bit stream to the memory circuit 5, a counter 3 whose count is incremented by a bit number of one frame, a control circuit 4 reading the content of the memory circuit 5 at a higher speed than a bit rate of the bit stream based on the count of the counter 3, a shift register 6 identifying a multi-frame identification code, an arithmetic circuit 8 calculating the count of the counter 3 based on the output of the shift register 6 and a comparator 9 comparing the output of the arithmetic circuit 8 and the output of the cyclic counter 1.</p> |
